QSoCs Certified Analog Layout Engineer (QCALE)

Category

Full time

Duration

4 Months

Eligibility

Diploma/BE/BTech/ME/MTech in an electronics/electrical stream

Timings

8am to 6pm (weekdays), 9am to 5pm (Saturday)

Semiconductors industry has been growing significantly over the time and has been creating a number of opportunities in several areas of it. Analog layout is one of the key areas. Our program QCALE has been designed to train electronics engineers freshly out of college with adequate technical skills and soft skills required for them to be able to meet the needs of the industry on the analog layout positions. The course is offered by industry experts with a good blend of concepts, tools, technique and hands on projects.

Key Features

  • Classes taken by experts and working professionals from industry
  • A right mix of concepts, tools, techniques and hands on projects
  • 6 weeks project covering standard analog blocks layout
  • Projects done with industry-standard EDA tools
  • Deep submicron issues and FinFET-based layouts covered
  • Includes soft skills development programs
  • Complete assistance for placement

Module-1: Digital Electronics

Number systems and conversion, universal logic gates, Boolean algebra, combination logic, latches and flip-flops, sequential logic

Module-2: Computing Basics

Introduction to Unix/Linux, commands and their usage, text editors, shell scripting, introduction to Perl and Tcl, introduction to revision control

Module-3: Basic Electronics

Concepts of voltage, current, power and energy, R, C and L components and their presence as parasitic elements in the layout, introduction to semiconductors, PN junction, BJT

Module-4: CMOS Overview

Basics of CMOS fabrication and IC packaging processes, MOSFET operation and characteristics, CMOS technology scaling, short-channel effects, introduction to FinFET, implementation of logic gates, latches and flip-flops

Module-5: Signal Integrity and Power Integrity

Signalling issues like delays, distortion, cross-talk, etc., power issues like IR drop, supply/ground bounce, common-conduction paths, etc., common solutions to these problems

Module-6: Physical Effects

High-current and over-voltage effects, antenna effect, ESD, mechanical stress effects, spatial effects, latch-up

Module-7: Analog Design Basics

CMOS analog, introduction to various analog blocks like current mirrors, amplifiers, voltage reference, voltage regulators, etc., design vs layout and design to layout interface dynamics

Module-8: Analog Layout

Layers and masks, layout tool, layout examples, DRC, ERC, LVS and parasitics extraction, introduction to Skill, basic layouts—current mirrors, amplifier stages, standard cells, etc.

Module-9: Layout Techniques

Fingers and multiplicity, metal widths, grounding, shielding, guard rings, matching of MOSFETS, resistors and capacitors, layout consideration for FinFET

Module-10: Industry-Standard Projects

Two-stage opamp, bandgap reference, voltage regulator (LDO) and IO involving floor planning, layout considerations, layout from scratch, physical verification, parasitics extraction, layout optimization for matching schematic performance, and layout of a bigger block involving integration of block-level layouts

Enroll Here