Weekend Design Verification

Category

Weekend Program

Duration

14 Weekends

Eligibility

VLSI professionals/Interns

Timings

9.00am - 5pm on Saturday & 9.00am - 1pm on Sunday

With the increasing functional complexities and decreasing dimensions of the die, verification of iCs is now becoming a more tedious work. To accept the challenges put forward by the semiconductor industry, methodological approach in verification is a must. This weekend design verification program is to provide working professionals a methodological approach on ASIC design verification. This course covers the spec-to-silicon flow of the chip. Our course content reflects current industry trends.We share real-world, applied knowledge to help you expand and solidify your skills.

Key Features

  • Classes taken by working professionals from industry.
  • All Modules include hands on work.
  • Assignments with fully automated Verification flow.
  • 2 projects on Industry accepted protocols.

Enroll Here